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ltm8029 1 8029f typical a pplica t ion fea t ures descrip t ion 36v in , 600ma step-down module converter with 5a quiescent current the ltm ? 8029 is a 36v in , 600ma step-down module ? converter with 5a quiescent current. it is an adjustable frequency buck switching regulator that consumes only 5a of quiescent current. the ltm8029 can accept an input as high as 36v in and operates at low input voltages due to its off-time skipping capability. burst mode operation maintains high efficiency at low output currents while keeping the output ripple low. the run pin features an accurate threshold and the shutdown current is 0.9a. a power good flag signals when v out reaches 90% of the programmed output voltage. the ltm8029 is packaged in a thermally enhanced, com - pact (11.25mm 6.25mm) and low profile (3.42mm) overmolded ball grid array (bga) package suitable for automated assembly by standard surface mount equip - ment. the ltm8029 is rohs compliant. l , lt, ltc, ltm, linear technology, the linear logo, burst mode and module are registered trademarks of linear technology corporation. all other trademarks are the property of their respective owners. a pplica t ions n complete switch mode power supply n low quiescent current burst mode ? operation 5a i q at 12v in to 3.3v out n 600ma output current n wide input voltage range: 4.5v to 36v (40v max ) n output voltage: 1.2v to 18v n excellent dropout performance n can be used as an inverter n adjustable switching frequency: 200khz to 2.2mhz n current mode control n (e1) rohs compliant package n tiny, low profile (11.25mm 6.25mm 3.42mm) sur face mount bga package n automotive battery regulation n power for portable products n distributed supply regulation n industrial supplies n wall transformer regulation 8029 ta01a ltm8029 rt gnd fb v in run v in 5.6v to 36v v out 5v 600ma v out bias pgood 309k 158k 1f f = 800khz 22f low quiescent current, 5v out , 600ma module regulator minimum input voltage vs output current output current (ma) 0 input voltage (v) 5.8 300 500 8029 ta01b 5.7 5.6 100 200 400 600 5.5 5.4
ltm8029 2 8029f p in c on f igura t ion a bsolu t e maxi m u m r a t ings v in , run .................................................................. 40v v out , bias ................................................................ 2 0v v in + bias ................................................................. 55 v pgood , fb, rt .......................................................... 6v m aximum internal temperature ........................... 1 25c solder temperature ............................................... 26 0c (notes 1, 2) v out hgfedc bank 1 bank 2 bias gnd pgoodfb rt run bank 3 ba 1 2 3 4 5 bga package 35-lead (11.25mm 6.25mm 3.42mm) top view v in t jmax = 125c, ja = 13.8c/w, jctop = 17.2c/w, jcbottom = 3.9c/w, jcb = 9.0c/w weight = 0.6g o r d er i n f or m a t ion lead free finish tray part marking* package description temperature range ltm8029ey#pbf ltm8029ey#pbf ltm8029y 35-lead (11.25mm 6.25mm 3.42mm) bga C40c to 125c ltm8029iy#pbf ltm8029iy#pbf ltm8029y 35-lead (11.25mm 6.25mm 3.42mm) bga C40c to 125c ltm8029mpy#pbf ltm8029mpy#pbf ltm8029y 35-lead (11.25mm 6.25mm 3.42mm) bga C55c to 125c consult ltc marketing for parts specified with wider operating temperature ranges. *the temperature grade is identified by a label on the shipping container. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ this product is only offered in trays. for more information go to: http://www.linear.com/packaging/
ltm8029 3 8029f e lec t rical c harac t eris t ics note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: the ltm8029e is guaranteed to meet performance specifications from 0c to 125c internal. specifications over the full C40c to 125c internal operating temperature range are assured by design, characterization and correlation with statistical process controls. the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c. v in = 12v, run = 12v unless otherwise noted (note 2). parameter conditions min typ max units minimum input voltage l 4.5 v output dc voltage i out 0.6a, r fb open i out 0.6a, r fb = 576k 1.2 3.3 v v output dc current 3.3v out 10 600 ma quiescent current into v in run = 0v no load no load l 0.9 5 9 a a a bias current 600ma load v in = 32v, v out = 20v at 100ma load 3.6 4.7 ma ma line regulation 5.5v < v in < 36v, i out = 600ma 0.3 % load regulation 10ma < i out < 600ma 0.4 % output rms voltage ripple i out = 600ma 10 mv switching frequency r t = 41.2k r t = 124k r t = 768k 2.2 1 200 mhz mhz khz voltage at fb pin l 1.185 1.175 1.20 1.20 1.215 1.225 v v internal feedback resistor 1 m minimum bias voltage for proper operation l 1.7 2.25 v run pin current run = 2.5v 1 30 na run threshold voltage l 0.95 1.3 v run voltage hysteresis 30 mv pgood threshold (at fb) v out rising 1.1 v pgood leakage current pgood = 6v 0.1 1 a pgood sink current pgood = 0.4v 100 a the ltm8029i is guaranteed to meet specifications over the full C40c to 125c internal operating temperature range. the ltm8029mp is guaranteed to meet specifications over the full C55c to 125c internal operating temperature range. note that the maximum internal temperature is determined by specific operating conditions in conjunction with board layout, the rated package thermal resistance and other environmental factors.
ltm8029 4 8029f typical p er f or m ance c harac t eris t ics 8v out efficiency vs output current, bias = 5v 12v out efficiency vs output current, bias = 5v 18v out efficiency vs output current, bias = 5v input current vs output current, 2.5v out , bias = 5v input current vs output current, 3.3v out , bias = 5v input current vs output current, 5v out , bias = 5v 2.5v out efficiency vs output current, bias = 5v 3.3v out efficiency vs output current, bias = 5v 5v out efficiency vs output current, bias = 5v t a = 25c, unless otherwise noted. configured per table 1, where applicable. output current (ma) 0 efficiency (%) 90 300 500 8029 g01 80 60 100 200 400 600 55 70 65 75 85 50 5v in 12v in 24v in 36v in output current (ma) 0 efficiency (%) 90 300 500 8029 g02 80 60 100 200 400 600 55 70 65 75 85 50 5v in 12v in 24v in 36v in output current (ma) 0 efficiency (%) 90 300 500 8029 g03 80 100 200 400 600 70 65 75 85 60 12v in 24v in 36v in output current (ma) 0 efficiency (%) 95 300 500 8029 g04 90 100 200 400 600 80 75 85 70 12v in 24v in 36v in output current (ma) 0 efficiency (%) 100 95 300 500 8029 g05 90 100 200 400 600 80 75 85 70 24v in 36v in output current (ma) 0 efficiency (%) 100 92 300 500 8029 g06 90 96 98 94 100 200 400 600 84 82 86 88 80 24v in 36v in output current (ma) 0 input current (ma) 450 300 500 8029 g07 400 100 200 400 600 300 50 350 250 200 100 150 0 5v in 12v in 24v in 36v in output current (ma) 0 input current (ma) 600 300 500 8029 g08 500 100 200 400 600 300 400 200 100 0 5v in 12v in 24v in 36v in output current (ma) 0 input current (ma) 350 300 500 8029 g09 300 100 200 400 600 200 250 150 100 50 0 12v in 24v in 36v in
ltm8029 5 8029f typical p er f or m ance c harac t eris t ics minimum v in vs v out , i out = 600ma, bias = 5v input current vs v in , output short, bias = 5v i bias vs i out , 2.5v out , bias = 5v i bias vs output current, 3.3v out , bias = 5v i bias vs output current, 5v out , bias = 5v input current vs output current, 8v out , bias = 5v input current vs output current, 12v out , bias = 5v input current vs output current, 18v out , bias = 5v t a = 25c, unless otherwise noted. configured per table 1, where applicable. output current (ma) 0 input current (ma) 500 300 500 8029 g10 100 200 400 600 300 400 450 200 100 250 350 150 50 0 12v in 24v in 36v in output current (ma) 0 input current (ma) 400 300 500 8029 g11 100 200 400 600 300 200 100 250 350 150 50 0 24v in 36v in output current (ma) 0 input current (ma) 500 300 500 8029 g12 100 200 400 600 300 200 100 250 400 450 350 150 50 0 24v in 36v in v out (v) 0 v in (v) 25 5 15 8029 g13 10 20 5 15 20 10 0 v in (v) 0 input current (ma) 450 10 30 8029 g14 20 40 50 150 200 100 250 350 400 300 0 f = 800khz f = 400khz output short-circuit current, bias = 5v v in (v) 0 output current (ma) 1700 10 30 8029 g15 20 40 1200 1100 1300 1500 1600 1400 1000 f = 800khz f = 400khz i out (ma) 0 i bias (ma) 8 300 500 8029 g16 6 7 100 200 400 600 2 1 3 4 5 0 5v in 12v in 24v in 36v in output current (ma) 0 i bias (ma) 10 300 500 8029 g17 6 8 9 7 100 200 400 600 2 1 3 4 5 0 5v in 12v in 24v in 36v in output current (ma) 0 i bias (ma) 8 300 500 8029 g18 6 7 100 200 400 600 2 1 3 4 5 0 12v in 24v in 36v in
ltm8029 6 8029f typical p er f or m ance c harac t eris t ics minimum v in vs output current, C3.3v out , bias = gnd minimum v in vs output current, C5v out , bias = gnd minimum v in vs output current, C8v out , bias = gnd minimum v in vs output current, C12v out , bias = gnd minimum v in vs output current, C18v out , bias = gnd temperature rise vs output current, 2.5v out i bias vs output current, 12v out , bias = 5v i bias vs output current, 18v out , bias = 5v output current (ma) 0 v in (v) 8 200 600 8029 g22 400 100 500 300 700 3 2 1 4 6 7 5 0 running to start output current (ma) 0 v in (v) 12 200 8029 g23 400 100 500 300 600 2 4 6 8 10 0 running to start output current (ma) 0 v in (v) 20 200 8029 g24 400 100 500 300 600 2 4 6 8 10 12 14 16 18 0 running to start output current (ma) 0 v in (v) 25 200 8029 g25 400 100 300 500 5 10 15 20 0 running to start output current (ma) 0 v in (v) 20 200 8029 g26 300 100 150 50 250 350 2 14 16 18 12 6 4 8 10 0 to start running output current (ma) 0 temperature rise (c) 18 300 500 8029 g27 12 14 16 100 200 400 600 4 2 6 8 10 0 12v in 24v in 36v in t a = 25c, unless otherwise noted. configured per table 1, where applicable. i bias vs output current, 8v out , bias = 5v output current (ma) 0 i bias (ma) 10 300 500 8029 g19 6 9 8 7 100 200 400 600 2 1 3 4 5 0 12v in 24v in 36v in output current (ma) 0 i bias (ma) 8 300 500 8029 g20 6 7 100 200 400 600 2 1 3 4 5 0 24v in 36v in output current (ma) 0 i bias (ma) 12 300 500 8029 g21 100 200 400 600 4 2 6 8 10 0 24v in 36v in
ltm8029 7 8029f typical p er f or m ance c harac t eris t ics temperature rise vs output current, 12v out temperature rise vs output current, 18v out temperature rise vs output current, C3.3v out temperature rise vs output current, C5v out temperature rise vs output current, C8v out temperature rise vs output current, C12v out temperature rise vs output current, 3.3v out temperature rise vs output current, 5v out temperature rise vs output current, 8v out output current (ma) 0 temperature rise (c) 18 300 500 8029 g28 12 14 16 100 200 400 600 4 2 6 8 10 0 12v in 24v in 36v in output current (ma) 0 temperature rise (c) 25 300 500 8029 g29 10 15 20 100 200 400 600 5 0 12v in 24v in 36v in output current (ma) 0 temperature rise (c) 25 300 500 8029 g30 10 15 20 100 200 400 600 5 0 12v in 24v in 36v in output current (ma) 0 temperature rise (c) 25 300 500 8029 g31 10 15 20 100 200 400 600 5 0 24v in 36v in output current (ma) 0 temperature rise (c) 30 25 300 500 8029 g32 10 15 20 100 200 400 600 5 0 24v in 36v in output current (ma) 0 temperature rise (c) 25 300 500 8029 g33 10 15 20 100 200 400 600 5 0 12v in 24v in output current (ma) 0 temperature rise (c) 30 25 300 500 8029 g34 10 15 20 100 200 400 600 5 0 12v in 24v in output current (ma) 0 temperature rise (c) 35 30 25 300 500 8029 g35 10 15 20 100 200 400 600 5 0 12v in 24v in output current (ma) 0 temperature rise (c) 35 30 25 300 8029 g36 10 15 20 100 200 400 500 5 0 12v in 24v in t a = 25c, unless otherwise noted. configured per table 1, where applicable.
ltm8029 8 8029f p in func t ions v in (bank 1): the v in pins supply current to the ltm8029s internal regulator and to the internal power switch. this pin must be locally bypassed with an external, low esr capacitor; see table 1 for recommended values. v out (bank 3): power output pins. apply the output filter capacitor and the output load between these pins and gnd pins. gnd (bank 2): tie these gnd pins to a local ground plane below the ltm8029 and the circuit components. in most applications the bulk of the heat flow out of the ltm8029 is through these pads, so the printed circuit design has a large impact on the thermal performance of the part. see the pcb layout and thermal considerations sections for more details. return the feedback resistor (r fb ) to this net. run (pin a1): pull the run pin below 0.95v to shut down the ltm8029. tie to 1.3v or more for normal operation. if the shutdown feature is not used, tie this pin to v in . fb (pin a2): the ltm8029 regulates its fb pin to 1.2v. connect the output feedback resistor from this pin to ground. the value of r fb is given by the equation r fb = 1200/(v out C 1.2), where r fb is in k. rt (pin b1): the rt pin is used to program the switching frequency of the ltm8029 by connecting a resistor from this pin to ground. the applications information section of the data sheet includes a table to determine the resistance value based on the desired switching frequency. pgood (pin b2): the pgood pin is the open-collector output of an internal comparator that monitors the fb pin. pgood remains low until the fb pin is within 10% of the final regulation voltage. pgood output is valid when v in is above 4.5v and run is high. if this function is not used, leave this pin floating. bias (pin h3): the bias pin powers internal circuitry. connect to a power source greater than 2.25v and less than 20v. if the output is greater than 2.25v, connect this pin there. also, make sure that bias + v in is less than 55v. b lock diagra m 8029 bd 0.1f 47pf 1f 1m v out bias 22h current mode controller v in run fb pgood rt gnd
ltm8029 9 8029f o pera t ion the ltm8029 is a standalone non-isolated step-down switching dc/dc power supply that can deliver up to 600ma of output current. this device features a very low quiescent current and provides a precisely regulated output voltage from 1.2v to 18v. the input voltage range is 4.5v to 36v. given that the ltm8029 is a step-down converter, make sure that the input voltage is high enough to support the desired output voltage and load current. as shown in the block diagram, the ltm8029 contains a current mode controller, power switching element, power inductor, power schottky diode and a modest amount of input and output capacitance. the ltm8029 is a fixed frequency pwm regulator. the switching frequency is set by simply connecting the appropriate resistor value from the rt pin to gnd. an internal regulator provides power to the control circuitry. the internal regulator normally draws power from the v in pin, but if the bias pin is connected to an external volt- age higher than 2.25v, bias power will be drawn from the external source (typically the regulated output voltage). this improves efficiency. the run pin is used to place the ltm8029 in shutdown. to optimize efficiency, the ltm8029 automatically switches to burst mode operation in light load situations. between bursts, all circuitry associated with controlling the output switch is shut down reducing the input supply current to typically 5a at no load and 12v in . since the ltm8029 is mostly shut down between bursts, the effective switching frequency will be lower than that programmed at the rt pin. for the same reason, the output ripple will be differ - ent than when the part is running at the full programmed frequency. the ltm8029 contains a power good comparator which trips when the fb pin is at roughly 90% of its regulated value. the pgood output is an open-collector transistor that is off when the output is in regulation, allowing an external resistor to pull the pgood pin high. power good is valid when the ltm8029 is enabled and v in is above 4.5v. the ltm8029 features the ability to skip the off-time in switching cycles when the input voltage approaches the target output. this allows the ltm8029 to operate at input voltages lower than other step-down regulators. in an overload or short-circuit condition, the ltm8029 will protect itself by limiting its peak switching current and decreasing the operating frequency to reduce overall power consumption. the ltm8029 is also equipped with a thermal shutdown that will inhibit power switching at high junction temperatures. the activation threshold of this function, however, is above 125c to avoid interfering with normal operation. thus, prolonged or repetitive operation under a condition in which the thermal shutdown activates may damage or impair the reliability of the device.
ltm8029 10 8029f a pplica t ions i n f or m a t ion for most applications, the design process is straight forward, summarized as follows: 1. look at table 1 and find the row that has the desired input range and output voltage. 2. apply the recommended c in , c out , r fb and r t values. 3. connect bias as indicated. while these component combinations have been tested for proper operation, it is incumbent upon the user to verify proper operation over the intended systems line, load and environmental conditions. bear in mind that the maximum output current is limited by junction tempera- ture, the relationship between the input and output voltage magnitude and polarity and other factors. please refer to the graphs in the typical performance characteristics section for guidance. the maximum frequency (and attendant r t value) at which the ltm8029 should be allowed to switch is given in table 1 in the f max column, while the recommended fre- quency (and r t value) for optimal efficiency over the given input condition is given in the f optimal column. the ltm8029 is capable of operating at low input voltages by skipping off-times to maintain regulation. this results in a lower operating frequency than that programmed by the rt pin, so it may be necessary to use larger input and output capacitors, depending upon the system require- ments. the recommended components and v in range listed in table 1 reflect an operation where off-times are not skipped. capacitor selection considerations the c in and c out capacitor values in table 1 are the minimum recommended values for the associated oper - ating conditions. applying capacitor values below those indicated in table 1 is not recommended, and may result in undesirable operation. using larger values is generally acceptable, and can yield improved dynamic response, if it is necessary. it is incumbent upon the user to verify proper operation over the intended systems line, load and environmental conditions. ceramic capacitors are small, robust and have very low esr. however, not all ceramic capacitors are suitable. x5r and x7r types are stable over temperature and applied voltage and give dependable service. other types, including y5v and z5u have very large temperature and voltage coefficients of capacitance. in an application circuit they may have only a small fraction of their nominal capacitance resulting in much higher output voltage ripple than expected. ceramic capacitors are also piezoelectric. in burst mode operation, the ltm8029s switching frequency depends on the load current, and can excite a ceramic capacitor at audio frequencies, generating audible noise. since the ltm8029 operates at a lower current limit during burst mode operation, the noise is typically very quiet to a ca - sual ear. if this audible noise is unacceptable, use a high performance electrolytic capacitor at the output. it may also be a parallel combination of a ceramic capacitor and a low cost electrolytic capacitor. a final precaution regarding ceramic capacitors concerns the maximum input voltage rating of the ltm8029. a ceramic input capacitor combined with trace or cable inductance forms a high q (under damped) tank circuit. if the ltm8029 circuit is plugged into a live supply, the input voltage can ring to twice its nominal value, possi- bly exceeding the devices rating. this situation is easily avoided; see the hot-plugging safety section.
ltm8029 11 8029f table 1. recommended component values and configuration v in (v)* v out (v) c in c out bias r fb f opt r t(opt) f max r t(min) 4.5-36 1.2 4.7f 50v 1206 x5r 100f 6.3v 1206 x5r 2.1v-20v open 270khz 536k 510khz 267k 4.5-36 1.5 4.7f 50v 1206 x5r 100f 6.3v 1206 x5r 2.1v-20v 4.02m 310khz 475k 600khz 220k 4.5-36 1.8 4.7f 50v 1206 x5r 100f 6.3v 1206 x5r 2.1v-20v 2m 350khz 402k 750khz 169k 4.5-36 2 4.7f 50v 1206 x5r 100f 6.3v 1206 x5r 2.1v-20v 1.5m 380khz 374k 780khz 162k 4.5-36 2.2 1f 50v 1206 x5r 47f 6.3v 1206 x5r 2.1v-20v 1.21m 450khz 309k 840khz 147k 4.5-36 2.5 1f 50v 0805 x5r 47f 6.3v 1206 x5r 2.1v-20v 931k 490khz 280k 950khz 127k 4.8-36 3.3 1f 50v 0805 x5r 22f 6.3v 1206 x5r v out 576k 615khz 215k 1.2mhz 93.1k 7.8-36 5 1f 50v 0805 x5r 22f 6.3v 1206 x5r v out 309k 800khz 158k 1.6mhz 61.9k 12-36 8 2.2f 50v 1206 x5r 22f 10v 1210 x5r 2.1v-20v 174k 830khz 150k 2.2mhz 41.2k 17-36 12 2.2f 50v 1206 x5r 10f 50v 1210 x5r 2.1v-20v 110k 880khz 137k 2.2mhz 41.2k 24.5-36 18 2.2f 50v 1206 x5r 10f 50v 1210 x5r 2.1v-20v 71.5k 880khz 137k 2.2mhz 41.2k 10-33 C3.3 1f 50v 0805 x5r 22f 6.3v 1206 x5r gnd 576k 615khz 215k 1.2mhz 93.1k 5.5-33 C3.3 4.7f 50v 1206 x5r 100f 6.3v 1206 x5r gnd 576k 615khz 215k 1.2mhz 93.1k 8-31 C5 2.2f 50v 1206 x5r 47f 6.3v 1206 x5r gnd 309k 800khz 158k 1.6mhz 61.9k 7-28 C8 2.2f 50v 1206 x5r 22f 10v 1210 x5r gnd 174k 830khz 150k 2.2mhz 41.2k 7-24 C12 2.2f 50v 1206 x5r 22f 16v 1210 x5r gnd 110k 880khz 137k 2.2mhz 41.2k 4.5-24 1.2 2.2f 50v 0805 x7r 47f 6.3v 1206 x5r 2.1v-20v open 400khz 348k 750khz 169k 4.5-24 1.5 2.2f 50v 0805 x7r 47f 6.3v 1206 x5r 2.1v-20v 4.02m 430khz 324k 930khz 130k 4.5-24 1.8 2.2f 50v 0805 x7r 47f 6.3v 1206 x5r 2.1v-20v 2m 450khz 309k 1mhz 124k 4.5-24 2 2.2f 50v 0805 x7r 47f 6.3v 1206 x5r 2.1v-20v 1.5m 480khz 287k 1.2mhz 93.1k 4.5-24 2.2 1f 50v 0805 x5r 47f 6.3v 1206 x5r 2.1v-20v 1.21m 545khz 249k 1.3mhz 82.5k 4.5-24 2.5 1f 50v 0805 x5r 47f 6.3v 1206 x5r 2.1v-20v 931k 580khz 232k 1.4mhz 73.2k 1.8-24 3.3 1f 25v 0603 x5r 22f 6.3v 1206 x5r v out 576k 615khz 215k 2.2mhz 41.2k 7.8-24 5 1f 25v 0603 x5r 22f 6.3v 1206 x5r v out 309k 800khz 158k 2.2mhz 41.2k 12-24 8 2.2f 50v 1206 x5r 22f 10v 1210 x5r 2.1v-20v 174k 830khz 150k 2.2mhz 41.2k 17-24 12 2.2f 50v 1206 x5r 10f 50v 1210 x5r 2.1v-20v 110k 880khz 137k 2.2mhz 41.2k 9-15 1.2 2.2f 50v 0805 x7r 47f 6.3v 1206 x5r 2.1v-20v open 400khz 348k 1.3mhz 84.5k 9-15 1.5 2.2f 50v 0805 x7r 47f 6.3v 1206 x5r 2.1v-20v 4.02m 430khz 324k 1.5mhz 66.5k 9-15 1.8 2.2f 50v 0805 x7r 47f 6.3v 1206 x5r 2.1v-20v 2m 450khz 309k 1.7mhz 57.6k 9-15 2 2.2f 50v 0805 x7r 47f 6.3v 1206 x5r 2.1v-20v 1.5m 480khz 287k 1.9mhz 49.9k 9-15 2.2 1f 50v 0805 x5r 47f 6.3v 1206 x5r 2.1v-20v 1.21m 545khz 249k 2mhz 46.4k 9-15 2.5 1f 50v 0805 x5r 47f 6.3v 1206 x5r 2.1v-20v 931k 580khz 232k 2.2mhz 41.2k 9-15 3.3 1f 25v 0603 x5r 22f 6.3v 1206 x5r v out 576k 615khz 215k 2.2mhz 41.2k 9-15 5 1f 25v 0603 x5r 22f 6.3v 1206 x5r v out 309k 800khz 158k 2.2mhz 41.2k 12-15 8 2.2f 50v 1206 x5r 22f 10v 1210 x5r 2.1v-20v 174k 830khz 150k 2.2mhz 41.2k notes: an input bulk capacitor is required. do not allow v in + bias to exceed 55v. the minimum input operating voltage may be lower than given in the table. refer to the applications information section for details. a pplica t ions i n f or m a t ion
ltm8029 12 8029f frequency selection the ltm8029 uses a constant frequency pwm architec - ture that can be programmed to switch from 200khz to 2.2mhz by using a resistor tied from the rt pin to ground. table 2 provides a list of r t resistor values and their resultant frequencies. table 2. frequency vs r t value frequency (mhz) r t (k) 0.2 768 0.4 348 0.6 220 0.8 158 1.0 124 1.2 93.1 1.4 73.2 1.6 61.9 1.8 52.3 2.0 46.4 2.2 41.2 operating frequency trade-offs it is recommended that the user apply the optimal r t resistor value given in table 1 for the input and output operating condition. system level or other considerations, however, may necessitate another operating frequency. while the ltm8029 is flexible enough to accommodate a wide range of operating frequencies, a haphazardly chosen one may result in undesirable operation under certain operating or fault conditions. a frequency that is too high can reduce efficiency, generate excessive heat or even damage the ltm8029 if the output is overloaded or short-circuited. a frequency that is too low can result in a final design that has too much output ripple or too large of an output capacitor. in addition, as shown in the typical performance characteristics section, the operat - ing frequency affects the amount of current that may be delivered during a short-circuit condition. a pplica t ions i n f or m a t ion bias pin considerations the bias pin is used to provide drive power for the in- ternal power switching stage and operate other internal circuitry. for proper operation, it must be powered by at least 2.25v. if the output voltage is programmed to 2.25v or higher, bias may be simply tied to v out . if v out is less than 2.25v, bias can be tied to v in or some other voltage source. if the bias pin voltage is too high, the efficiency of the ltm8029 may suffer. the optimum bias voltage is dependent upon many factors, such as load current, input voltage, output voltage and switching frequency, but 4v to 5v works well in many applications. in all cases, ensure that the maximum voltage at the bias pin is less than 25v and that the sum of v in and bias is less than 55v. if bias power is applied from a remote or noisy voltage source, it may be necessary to apply a decoupling capacitor locally to the pin. burst mode operation to enhance efficiency at light loads, the ltm8029 auto - matically switches to burst mode operation which keeps the output capacitor charged to the proper voltage while minimizing the input quiescent current. during burst mode operation, the ltm8029 delivers single cycle bursts of current to the output capacitor followed by sleep periods where the output power is delivered to the load by the output capacitor. since the ltm8029 is mostly shut down between bursts, the effective switching frequency will be lower than that programmed at the rt pin. for the same reason, the output ripple will be different than when the part is running at the full programmed frequency. in ad - dition, v in and bias quiescent currents are each greatly reduced to during the sleep time. as the load current decreases towards a no load condition, the percentage of time that the ltm8029 operates in sleep mode increases and the average input current is greatly reduced, resulting in higher efficiency.
ltm8029 13 8029f a pplica t ions i n f or m a t ion run the ltm8029 is in shutdown when the run pin is low and active when the pin is high. the rising threshold of the run comparator is typically 1.15v, with a 30mv hysteresis. this threshold is accurate when v in is above 4.5v. adding a resistor divider from v in to run programs the ltm8029 to operate only when v in is above a desired voltage (see figure 1). this rising threshold voltage, v in(run) , can be adjusted by setting the values r3 and r4 such that they satisfy the following equation: v in(run) = r3 + r4 r4 ? 1.15v where the ltm8029 should not start until v in is above v in(run) . note that due to the run pins hysteresis, opera - tion will not stop until the input falls slightly below v in(run) . it also means that the effective frequency during this mode of operation will be lower than the one programmed by the resistor connected to the rt pin, so it may be necessary to use larger input and output capacitors, depending upon the system requirements. shorted input protection care needs to be taken in systems where the output will be held high when the input to the ltm8029 is absent. this may occur in battery charging applications or in battery backup systems where a battery or some other supply is diode ored with the ltm8029s output. if the v in pin is allowed to float and the run pin is held high (either by a logic signal or because it is tied to v in ), then the ltm8029s internal circuitry will pull its quiescent current through its internal power switch. this is fine if your system can tolerate a few milliamps in this state. if you ground the run pin, the input current will drop to essentially zero. however, if the v in pin is grounded while the output is held high, then parasitic diodes inside the ltm8029 can pull large currents from the output through the v in pin. figure 2 shows a circuit that will run only when the input voltage is present and that protects against a shorted or reversed input. figure 1. r3 and r4 set the minimum operating threshold voltage 8029 f01 ltm8029 v in run v in r3 r4 8029 f02 ltm8029 gnd v in run rt v in v out v out bias fb figure 2. the input diode prevents shorted input from discharging a backup battery tied to the output. it also protects the circuit from a reversed input. the ltm8029 runs only when the input is present minimum input voltage the ltm8029 is a step-down converter, so a minimum amount of headroom is required to keep the output in regulation. curves detailing the minimum input voltage of the ltm8029 for various load conditions are included in the typical performance characteristics section. the ltm8029 features the ability to skip the off-time in switching cycle when the input voltage approaches the target output. this allows the ltm8029 to operate an input voltages lower than other step-down regulators. graphs of minimum input voltage versus output voltage and load are given in the typical performance characteristics section.
ltm8029 14 8029f power good the pgood pin is the open-collector output of an internal comparator that monitors the voltage at the fb pin. it is used to indicate whether the output is near or within regulation. specifically, pgood is low unless the fb pin is within 10% of the final regulation voltage. pgood output is valid when v in is above 4.5v and run is high. if this function is not used, leave this pin floating. hot-plugging safely the small size, robustness and low impedance of ceramic capacitors make them an attractive option for the input bypass capacitor of ltm8029. however, these capacitors can cause problems if the ltm8029 is hot-plugged into a live supply (see application note 88 for a complete dis- cussion). the low loss ceramic capacitor combined with stray inductance in series with the power source forms an underdamped tank circuit, and the voltage at the v in pin of the ltm8029 can ring to more than twice the nominal input voltage, possibly exceeding the ltm8029s rating and damaging the part. if the input supply is poorly controlled or the user will be hot-plugging the ltm8029 into an energized supply, the input network should be designed to prevent this overshoot. this can be accomplished by installing a small resistor in series to v in , but the most popular method of controlling input voltage overshoot is to add an electrolytic bulk capacitor to the v in net. this capacitors relatively high equivalent series resistance usually damps the circuit and eliminates the voltage overshoot. the extra capacitor improves low frequency ripple filtering and can slightly improve the efficiency of the circuit, though it is likely to be the largest component in the circuit. pcb layout most of the headaches associated with pcb layout have been alleviated or even eliminated by the high level of integration of the ltm8029. the ltm8029 is neverthe - less a switching power supply, and care must be taken to minimize emi and ensure proper operation. even with the high level of integration, you may fail to achieve specified operation with a haphazard or poor layout. see figure 3 for a suggested layout. ensure that the grounding and heat sinking are acceptable. 1. place the r fb and r t resistors as close as possible to their respective pins. 2. place the c in capacitor as close as possible to the v in and gnd connection of the ltm8029. 3. place the c out capacitor as close as possible to the v out and gnd connection of the ltm8029. 4. place the c in and c out capacitors such that their ground currents flow directly adjacent or underneath the ltm8029. 5. connect all of the gnd connections to as large a copper pour or plane area as possible on the top layer. avoid breaking the ground connection between the external components and the ltm8029. 6. for good heat sinking, use vias to connect the gnd cop- per area to the boards internal ground planes. liberally distribute these gnd vias to provide both a good ground connection and thermal path to the internal planes of the printed circuit board. pay attention to the location and density of the thermal vias in figure 3. the ltm8029 can benefit from the heat sinking afforded by vias that connect to internal gnd planes at these locations, due to their proximity to internal power handling compo- nents. the optimum number of thermal vias depends upon the printed circuit board design. for example, a board might use very small via holes. it should employ more thermal vias than a board that uses larger holes. figure 3. layout showing suggested external components, gnd plane and thermal vias a pplica t ions i n f or m a t ion v out v in bias gnd gnd pgood thermal vias 8029 f03 r fb r t run c out c in
ltm8029 15 8029f a pplica t ions i n f or m a t ion thermal considerations the ltm8029 output current may need to be derated if it is required to operate in a high ambient temperature or deliver a large amount of continuous power. the amount of current derating is dependent upon the input voltage, output power and ambient temperature. the temperature rise curves given in the typical performance character - istics section can be used as a guide. these curves were generated by a ltm8029 mounted to a 40cm 2 4-layer fr4 printed circuit board. boards of other sizes and layer count can exhibit different thermal behavior, so it is incumbent upon the user to verify proper operation over the intended systems line, load and environmental operating conditions. the thermal resistance numbers listed in the pin con- figuration are based on modeling the module package mounted on a test board specified per jesd 51-9 (test boards for area array surface mount package thermal measurements). the thermal coefficients provided in this page are based on jesd 51-12 (guidelines for reporting and using electronic package thermal information). for increased accuracy and fidelity to the actual application, many designers use fea to predict thermal performance. to that end, the pin configuration section typically gives four thermal coefficients: ? ja C thermal resistance from junction to ambient ? jcbottom C thermal resistance from junction to the bottom of the product case ? jctop C thermal resistance from junction to top of the product case ? jb C thermal resistance from junction to the printed circuit board while the meaning of each of these coefficients may seem to be intuitive, jedec has defined each to avoid confusion and inconsistency. these definitions are given in jesd 51-12, and are quoted or paraphrased below: ? ja is the natural convection junction-to-ambient air thermal resistance measured in a one cubic foot sealed enclosure. this environment is sometimes referred to as still air although natural convection causes the air to move. this value is determined with the part mounted to a jesd 51-9 defined test board, which does not reflect an actual application or viable operating condition. ? jcbottom is the thermal resistance between the junction and bottom of the package with all of the component power dissipation flowing through the bottom of the package. in the typical module converter, the bulk of the heat flows out the bottom of the package, but there is always heat flow out into the ambient environment. as a result, this thermal resistance value may be useful for comparing packages but the test conditions dont generally match the users application. ? jctop is determined with nearly all of the component power dissipation flowing through the top of the pack - age. as the electrical connections of the typical module converter are on the bottom of the package, it is rare for an application to operate such that most of the heat flows from the junction to the top of the part. as in the case of jcbottom , this value may be useful for comparing packages but the test conditions dont generally match the users application. ? jb is the junction-to-board thermal resistance where almost all of the heat flows through the bottom of the module converter and into the board, and is really the sum of the jcbottom and the thermal resistance of the bottom of the part through the solder joints and through a portion of the board. the board temperature is measured a specified distance from the package, using a two sided, two layer board. this board is described in jesd 51-9.
ltm8029 16 8029f a pplica t ions i n f or m a t ion given these definitions, it should now be apparent that none of these thermal coefficients reflects an actual physical operating condition of a module converter. thus, none of them can be individually used to accurately predict the thermal performance of the product. likewise, it would be inappropriate to attempt to use any one coefficient to correlate to the junction temperature vs load graphs given in the products data sheet. the only appropriate way to use the coefficients is when running a detailed thermal analysis, such as fea, which considers all of the thermal resistances simultaneously. a graphical representation of these thermal resistances is given in figure 4. the blue resistances are contained within the module converter, and the green are outside. the die temperature of the ltm8029 must be lower than the maximum rating of 125c, so care should be taken in the layout of the circuit to ensure good heat sinking of the ltm8029. the bulk of the heat flow out of the ltm8029 is through the bottom of the module converter and the bga pads into the printed circuit board. consequently a poor printed circuit board design can cause excessive heating, resulting in impaired performance or reliability. please refer to the pcb layout section for printed circuit board design suggestions. 8029 f04 module device junction-to-case (top) resistance junction-to-board resistance junction-to-ambient resistance (jesd 51-9 defined board) case (top)-to-ambient resistance board-to-ambient resistance junction-to-case (bottom) resistance junction ambient case (bottom)-to-board resistance figure 4. graphical representation of jesd 51-12 thermal coefficients
ltm8029 17 8029f a pplica t ions i n f or m a t ion 1.2v step-down converter 8029 ta02 ltm8029 rt gnd fb v in run bias v in 4.5v to 12v v out 1.2v 600ma v out pgood 309k 2.2f 47f 2.5v step-down converter 8029 ta03 ltm8029 rt gnd fb v in run v in 4.5v to 36v v out 2.5v 600ma v out bias pgood 280k 931k 1f 47f 5v step-down converter C5v inverting output converter 8029 ta04 ltm8029 rt gnd fb v in run v in 7.8v to 36v v out 5v 600ma v out bias pgood 158k 309k 1f 22f minimum v in vs output current output current (ma) 0 v in (v) 12 300 500 8029 ta06 6 4 100 200 400 600 2 10 8 0 running to start 8029 ta05 ltm8029 rt gnd fb v in run v in 4.5v to 31v v out ?5v v out bias pgood 158k 309k 2.2f 47f
ltm8029 18 8029f table 3. pin assignment table (arranged by pin number) pin function pin function pin function pin function a1 run b1 rt c1 gnd d1 gnd a2 fb b2 pgood c2 gnd d2 gnd a3 C b3 C c3 C d3 gnd a4 v in b4 v in c4 C d4 gnd a5 v in b5 v in c5 C d5 gnd pin function pin function pin function pin function e1 gnd f1 gnd g1 gnd h1 gnd e2 gnd f2 gnd g2 gnd h2 gnd e3 gnd f3 v out g3 v out h3 bias e4 gnd f4 v out g4 v out h4 v out e5 gnd f5 v out g5 v out h5 v out p ackage descrip t ion
ltm8029 19 8029f information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa - tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. p ackage descrip t ion bga package 35-lead (11.25mm 6.25mm 3.42mm) (reference ltc dwg # 05-08-1878 rev ?) b package top view 4 pin ?a1? corner y x aaa z aaa z detail a package bottom view 3 see notes suggested pcb layout top view 0.000 0.635 1.905 0.635 3.175 1.905 4.445 3.175 4.445 2.540 1.270 2.540 1.270 0.3175 0.3175 0.000 h g f e d c b a 12345 pin 1 2.8575 3.4925 bga 35 0510 rev ? ltmxxxxxx module tray pin 1 bevel package in tray loading orientation component pin ?a1? notes: 1. dimensioning and tolerancing per asme y14.5m-1994 2. all dimensions are in millimeters ball designation per jesd ms-028 and jep95 5. primary datum -z- is seating plane 4 3 details of pin #1 identifier are optional, but must be located within the zone indicated. the pin #1 identifier may be either a mold or marked feature detail b substrate 0.27 ? 0.37 2.45 ? 2.55 // bbb z a a1 b1 ccc z detail b package side view mold cap z symbol a a1 a2 b b1 d e e f g aaa bbb ccc ddd eee min 3.22 0.50 2.72 0.71 0.60 nom 3.42 0.60 2.82 0.78 0.63 11.25 6.25 1.27 8.89 5.08 max 3.62 0.70 2.92 0.85 0.66 0.15 0.10 0.20 0.30 0.15 notes dimensions total number of balls: 35 a2 d e e f g detail a ?b (35 places) m x yzddd m zeee
ltm8029 20 8029f linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax : (408) 434-0507 www.linear.com linear technology corporation 2012 lt 0312 ? printed in usa r ela t e d p ar t s typical a pplica t ion part number description comments LTM8020 36v, 200ma module regulator 4v v in 36v, 1.25v v out 5v ltm8021 36v, 500ma module regulator 3v v in 36v, 0.8v v out 5v ltm8022 36v, 1a module regulator 3.6v v in 36v, 0.8v v out 10v ltm8023 36v, 2a module regulator 3.6v v in 36v, 0.8v v out 10v ltm8048 isolated module regulator 725v dc isolation, 3.1v v in 32v, 300ma C12v inverting output converter minimum v in vs output current, C12v out , bias = gnd output current (ma) 0 v in (v) 25 200 8029 ta07b 400 100 300 500 5 10 15 20 0 running to start 8029 ta07a ltm8029 rt gnd fb v in run v in 4.5v to 31v v out ?12v v out bias pgood 137k 110k 2.2f 22f p ackage p ho t o 11.25mm 6.25mm 3.42mm

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